| Age | Commit message (Expand) | Author |
|---|---|---|
| 2022-10-26 | clk: zynqmp: pll: rectify rate rounding in zynqmp_pll_round_rate | Quanyang Wang |
| 2021-05-14 | clk: zynqmp: move zynqmp_pll_set_mode out of round_rate callback | Quanyang Wang |
| 2018-10-09 | drivers: clk: Add ZynqMP clock driver | Jolly Shah |
 |
index : linux-toradex.git | |
| Linux kernel for Apalis, Colibri and Verdin modules | Marcel Ziswiler |
| summaryrefslogtreecommitdiff |