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path: root/drivers/gpu/drm/i915/i915_reg.h
AgeCommit message (Expand)Author
2015-07-02Merge tag 'drm-intel-next-fixes-2015-07-02' of git://anongit.freedesktop.org/...Linus Torvalds
2015-06-29drm/i915: fix backlight after resume on 855gmJani Nikula
2015-06-26Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds
2015-05-29Merge branch 'for-linus' into for-nextTakashi Iwai
2015-05-28drm/i915: Throw out WIP CHV power well definitionsVille Syrjälä
2015-05-28drm/i915: Use the default 600ns LDO programming sequence delayVille Syrjälä
2015-05-22drm/i915: Enable GTT caching on gen8Ville Syrjälä
2015-05-21drm/i915: Clean up the CPT DP .get_hw_state() port readoutVille Syrjälä
2015-05-21drm/i915/skl: Deinit/init the display at suspend/resumeDamien Lespiau
2015-05-21drm/i915/bxt: fix WaForceContextSaveRestoreNonCoherent on steppings B0+Imre Deak
2015-05-20drm/i915/bxt: Port PLL programming BUNVandana Kannan
2015-05-20drm/i915: Adding dbuf support for skl nv12 format.Chandra Konduru
2015-05-08drm/i915: Work around DISPLAY_PHY_CONTROL register corruption on CHVVille Syrjälä
2015-05-08drm/i915: Implement chv display PHY lane stagger setupVille Syrjälä
2015-05-08drm/i915/skl: Fix WaDisableChickenBitTSGBarrierAckForFFSliceCSDamien Lespiau
2015-05-08drm/i915/bxt: Add WaDisableSbeCacheDispatchPortSharingNick Hoath
2015-05-08drm/i915/bxt: BLC implementationVandana Kannan
2015-05-08drm/i915: Merge the GEN9 memory latency PCU opcode with its friendsDamien Lespiau
2015-05-08drm/i915: Re-order the PCU opcodesDamien Lespiau
2015-05-08drm/i915/skl: Fix the CTRL typo in the DPLL_CRTL1 definesDamien Lespiau
2015-05-08drm/i915: Setup static bias for GPUDeepak S
2015-05-08drm/i915/skl: Implement enable/disable for Display C5 state.A.Sunil Kamath
2015-05-08Merge tag 'drm-intel-next-2015-04-23-fixed' of git://anongit.freedesktop.org/...Dave Airlie
2015-05-05drm/i915/audio: add codec wakeup override enabled/disable callbackLu, Han
2015-04-28drm/i915/chv: Implement WaDisableShadowRegForCpdDeepak S
2015-04-23drm/i915: cope with large i2c transfersDmitry Torokhov
2015-04-16drm/i915/bxt: VSwing programming sequenceVandana Kannan
2015-04-16drm/i915/bxt: Define bxt DDI PLLs and implement enable/disable sequenceSatheeshakrishna M
2015-04-16drm/i915/bxt: Implement enable/disable for Display C9 stateA.Sunil Kamath
2015-04-16drm/i915/bxt: add description about the BXT PHYsImre Deak
2015-04-16drm/i915/bxt: add display initialize/uninitialize sequence (PHY)Vandana Kannan
2015-04-16drm/i915/bxt: add display initialize/uninitialize sequence (CDCLK)Vandana Kannan
2015-04-14drm/i915: PSR: Remove wrong LINK_DISABLE.Rodrigo Vivi
2015-04-14drm/i915/bxt: Enable GMBUS IRQShashank Sharma
2015-04-14drm/i915/bxt: DDI Hotplug interrupt setupShashank Sharma
2015-04-14drm/i915: add bxt gmbus supportJani Nikula
2015-04-14Merge branch 'topic/bxt-stage1' into drm-intel-next-queuedDaniel Vetter
2015-04-14drm/i915/bxt: add workaround to avoid PTE corruptionRobert Beckett
2015-04-14drm/i915/bxt: add WaDisableMaskBasedCammingInRCC workaroundBen Widawsky
2015-04-14drm/i915/bxt: add GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ workaroundBen Widawsky
2015-04-13drm/i915: Register definitions for skylake scalersChandra Konduru
2015-04-10drm/i915/skl: Support for 90/270 rotationSonika Jindal
2015-04-10drm/i915: Naming constants to be written to GEN9_PG_ENABLESagar Kamble
2015-04-10drm/i915: Agressive downclocking on BaytrailChris Wilson
2015-04-10drm/i915/skl: Implement WaDisableVFUnitClockGatingDamien Lespiau
2015-04-09drm/i915/bxt: Support BXT in SSEU device status dumpJeff McGee
2015-04-09drm/i915/bxt: Determine BXT slice/subslice/EU infoJeff McGee
2015-04-09drm/i915/bxt: Add the plane4 related interrupt definitionsDamien Lespiau
2015-04-07drm/i915/bdw: WaProgramL3SqcReg1DefaultRodrigo Vivi
2015-04-07drm/i915/skl: Enabling PSR2 SU with frame syncSonika Jindal