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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2022 Toradex
*/
/ {
sound_card: sound-card {
compatible = "simple-audio-card";
simple-audio-card,bitclock-master = <&dailink_master>;
simple-audio-card,format = "i2s";
simple-audio-card,frame-master = <&dailink_master>;
simple-audio-card,mclk-fs = <256>;
simple-audio-card,name = "imx8mm-nau8822";
simple-audio-card,routing =
"Headphones", "LHP",
"Headphones", "RHP",
"Speaker", "LSPK",
"Speaker", "RSPK",
"Line Out", "AUXOUT1",
"Line Out", "AUXOUT2",
"LAUX", "Line In",
"RAUX", "Line In",
"LMICP", "Mic In",
"RMICP", "Mic In";
simple-audio-card,widgets =
"Headphones", "Headphones",
"Line Out", "Line Out",
"Speaker", "Speaker",
"Microphone", "Mic In",
"Line", "Line In";
dailink_master: simple-audio-card,codec {
clocks = <&clk IMX8MM_CLK_SAI2_ROOT>;
sound-dai = <&nau8822_1a>;
};
simple-audio-card,cpu {
sound-dai = <&sai2>;
};
};
};
/* Verdin SPI_1 */
&ecspi2 {
status = "okay";
};
/* EEPROM on display adapter boards */
&eeprom_display_adapter {
status = "okay";
};
/* EEPROM on Verdin Development board */
&eeprom_carrier_board {
status = "okay";
};
&fec1 {
status = "okay";
};
/* Verdin QSPI_1 */
&flexspi {
status = "okay";
};
&gpio_expander_21 {
status = "okay";
};
/* Current measurement into module VCC */
&hwmon {
status = "okay";
};
&hwmon_temp {
vs-supply = <®_1p8v>;
status = "okay";
};
&i2c3 {
status = "okay";
};
/* Verdin I2C_1 */
&i2c4 {
status = "okay";
/* Audio Codec */
nau8822_1a: audio-codec@1a {
compatible = "nuvoton,nau8822";
reg = <0x1a>;
#sound-dai-cells = <0>;
};
};
/* Verdin PCIE_1 */
&pcie0 {
status = "okay";
};
&pcie_phy {
status = "okay";
};
/* Verdin PWM_3_DSI */
&pwm1 {
status = "okay";
};
/* Verdin PWM_1 */
&pwm2 {
status = "okay";
};
/* Verdin PWM_2 */
&pwm3 {
status = "okay";
};
/* Verdin I2S_1 */
&sai2 {
status = "okay";
};
/* Verdin UART_3 */
&uart1 {
status = "okay";
};
/* Verdin UART_1, connector X50 through RS485 transceiver */
&uart2 {
linux,rs485-enabled-at-boot-time;
rs485-rts-active-low;
rs485-rx-during-tx;
status = "okay";
};
/* Verdin UART_2 */
&uart3 {
status = "okay";
};
/* Verdin USB_1 */
&usbotg1 {
disable-over-current;
status = "okay";
};
/* Verdin USB_2 */
&usbotg2 {
disable-over-current;
status = "okay";
};
/* Limit frequency on dev board due to long traces and bad signal integrity */
&usdhc2 {
max-frequency = <100000000>;
status = "okay";
};
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