1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
|
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* Copyright 2017-2020 Toradex
*/
#include "imx8qm-apalis-v1.1.dtsi"
/ {
model = "Toradex Apalis iMX8QM";
compatible = "toradex,apalis-imx8",
"fsl,imx8qm";
};
/delete-node/ &pcie_wifi_refclk;
/delete-node/ &pcie_wifi_refclk_gate;
ðphy0 {
interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
};
&lsio_gpio0 {
gpio-line-names = "MXM3_279",
"MXM3_277",
"MXM3_135",
"MXM3_203",
"MXM3_201",
"MXM3_275",
"MXM3_110",
"MXM3_120",
"MXM3_1/GPIO1",
"MXM3_3/GPIO2",
"MXM3_124",
"MXM3_122",
"MXM3_5/GPIO3",
"MXM3_7/GPIO4",
"",
"",
"MXM3_4",
"MXM3_211",
"MXM3_209",
"MXM3_2",
"MXM3_136",
"MXM3_134",
"MXM3_6",
"MXM3_8",
"MXM3_112",
"MXM3_118",
"MXM3_114",
"MXM3_116";
};
&lsio_gpio1 {
gpio-line-names = "",
"",
"",
"",
"MXM3_286",
"",
"MXM3_87",
"MXM3_99",
"MXM3_138",
"MXM3_140",
"MXM3_239",
"",
"MXM3_281",
"MXM3_283",
"MXM3_126",
"MXM3_132",
"",
"",
"",
"",
"MXM3_173",
"MXM3_175",
"MXM3_123";
};
&lsio_gpio2 {
gpio-line-names = "",
"",
"",
"",
"",
"",
"",
"MXM3_198",
"MXM3_35",
"MXM3_164",
"",
"",
"",
"",
"MXM3_217",
"MXM3_215",
"",
"",
"MXM3_193",
"MXM3_194",
"MXM3_37",
"",
"MXM3_271",
"MXM3_273",
"MXM3_195",
"MXM3_197",
"MXM3_177",
"MXM3_179",
"MXM3_181",
"MXM3_183",
"MXM3_185",
"MXM3_187";
};
&lsio_gpio3 {
gpio-line-names = "MXM3_191",
"",
"MXM3_221",
"MXM3_225",
"MXM3_223",
"MXM3_227",
"MXM3_200",
"MXM3_235",
"MXM3_231",
"MXM3_229",
"MXM3_233",
"MXM3_204",
"MXM3_196",
"",
"MXM3_202",
"",
"",
"",
"MXM3_305",
"MXM3_307",
"MXM3_309",
"MXM3_311",
"MXM3_315",
"MXM3_317",
"MXM3_319",
"MXM3_321",
"MXM3_15/GPIO7",
"MXM3_63",
"MXM3_17/GPIO8",
"MXM3_12",
"MXM3_14",
"MXM3_16";
};
&lsio_gpio4 {
gpio-line-names = "MXM3_18",
"MXM3_11/GPIO5",
"MXM3_13/GPIO6",
"MXM3_274",
"MXM3_84",
"MXM3_262",
"MXM3_96",
"",
"",
"",
"",
"",
"MXM3_190",
"",
"",
"",
"MXM3_269",
"MXM3_251",
"MXM3_253",
"MXM3_295",
"MXM3_299",
"MXM3_301",
"MXM3_297",
"MXM3_293",
"MXM3_291",
"MXM3_289",
"MXM3_287";
};
&lsio_gpio5 {
gpio-line-names = "",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"MXM3_150",
"MXM3_160",
"MXM3_162",
"MXM3_144",
"MXM3_146",
"MXM3_148",
"MXM3_152",
"MXM3_156",
"MXM3_158",
"MXM3_159",
"MXM3_184",
"MXM3_180",
"MXM3_186",
"MXM3_188",
"MXM3_176",
"MXM3_178";
};
&lsio_gpio6 {
gpio-line-names = "",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"MXM3_261",
"MXM3_263",
"MXM3_259",
"MXM3_257",
"MXM3_255",
"MXM3_128",
"MXM3_130",
"MXM3_265",
"MXM3_249",
"MXM3_247",
"MXM3_245",
"MXM3_243";
};
/* Apalis I2C2 (DDC) */
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpi2c0>;
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <100000>;
};
&hdmi {
ddc-i2c-bus = <&i2c0>;
};
&pinctrl_fec1 {
fsl,pins = <
IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD 0x000014a0 /* Use pads in 1.8V mode */
IMX8QM_ENET0_MDC_CONN_ENET0_MDC 0x06000020
IMX8QM_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020
IMX8QM_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x06000020
IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC 0x06000020
IMX8QM_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x06000020
IMX8QM_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x06000020
IMX8QM_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2 0x06000020
IMX8QM_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3 0x06000020
IMX8QM_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC 0x06000020
IMX8QM_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x06000020
IMX8QM_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x06000020
IMX8QM_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x06000020
IMX8QM_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2 0x06000020
IMX8QM_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 0x06000020
IMX8QM_ENET0_REFCLK_125M_25M_CONN_ENET0_REFCLK_125M_25M 0x06000020
/* On-module ETH_RESET# */
IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11 0x06000020
/* On-module ETH_INT# */
IMX8QM_LVDS0_GPIO01_LSIO_GPIO1_IO05 0x04000060
>;
};
&pinctrl_fec1_sleep {
fsl,pins = <
IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD 0x000014a0
IMX8QM_ENET0_MDC_LSIO_GPIO4_IO14 0x04000040
IMX8QM_ENET0_MDIO_LSIO_GPIO4_IO13 0x04000040
IMX8QM_ENET0_RGMII_TX_CTL_LSIO_GPIO5_IO31 0x04000040
IMX8QM_ENET0_RGMII_TXC_LSIO_GPIO5_IO30 0x04000040
IMX8QM_ENET0_RGMII_TXD0_LSIO_GPIO6_IO00 0x04000040
IMX8QM_ENET0_RGMII_TXD1_LSIO_GPIO6_IO01 0x04000040
IMX8QM_ENET0_RGMII_TXD2_LSIO_GPIO6_IO02 0x04000040
IMX8QM_ENET0_RGMII_TXD3_LSIO_GPIO6_IO03 0x04000040
IMX8QM_ENET0_RGMII_RXC_LSIO_GPIO6_IO04 0x04000040
IMX8QM_ENET0_RGMII_RX_CTL_LSIO_GPIO6_IO05 0x04000040
IMX8QM_ENET0_RGMII_RXD0_LSIO_GPIO6_IO06 0x04000040
IMX8QM_ENET0_RGMII_RXD1_LSIO_GPIO6_IO07 0x04000040
IMX8QM_ENET0_RGMII_RXD2_LSIO_GPIO6_IO08 0x04000040
IMX8QM_ENET0_RGMII_RXD3_LSIO_GPIO6_IO09 0x04000040
IMX8QM_ENET0_REFCLK_125M_25M_LSIO_GPIO4_IO15 0x04000040
IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11 0x04000040
IMX8QM_LVDS0_GPIO01_LSIO_GPIO1_IO05 0x04000040
>;
};
&iomuxc {
apalis-imx8qm {
/* Apalis I2C2 (DDC) */
pinctrl_lpi2c0: lpi2c0grp {
fsl,pins = <
IMX8QM_HDMI_TX0_TS_SCL_DMA_I2C0_SCL 0x04000022
IMX8QM_HDMI_TX0_TS_SDA_DMA_I2C0_SDA 0x04000022
>;
};
};
};
/* On-module PCIe_CTRL0_CLKREQ */
&pinctrl_pcie_sata_refclk {
fsl,pins = <
IMX8QM_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO27 0x00000021
>;
};
&pcie_sata_refclk_gate {
enable-gpios = <&lsio_gpio4 27 GPIO_ACTIVE_HIGH>;
};
/* On-module Wi-Fi */
&pcieb {
clocks = <&pcieb_lpcg 0>,
<&pcieb_lpcg 1>,
<&pcieb_lpcg 2>,
<&phyx2_lpcg 1>,
<&phyx2_lpcg 0>,
<&phyx2_crr0_lpcg 0>,
<&pcieb_crr3_lpcg 0>,
<&pciea_crr2_lpcg 0>,
<&misc_crr5_lpcg 0>,
<&pcie_sata_refclk_gate>;
clock-names = "pcie", "pcie_bus", "pcie_inbound_axi",
"pcie_phy", "pcie_phy_pclk", "phy_per",
"pcie_per", "pciex2_per", "misc_per",
"pcie_ext";
};
/* Apalis MMC1 */
&usdhc2 {
/*
* The PMIC on V1.0A HW generates 1.6V instead of 1.8V which creates
* issues with certain SD cards, disable 1.8V signaling for now.
*/
no-1-8-v;
};
/* Apalis SD1 */
&usdhc3 {
/*
* The PMIC on V1.0A HW generates 1.6V instead of 1.8V which creates
* issues with certain SD cards, disable 1.8V signaling for now.
*/
no-1-8-v;
};
|
