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authorTom Rini <trini@konsulko.com>2020-01-06 17:07:49 -0500
committerTom Rini <trini@konsulko.com>2020-01-06 17:07:49 -0500
commit5a8fa095cb848c60c630a83edf30d4fc46101e90 (patch)
tree66652768520899ddea6a24a608c1be4ed6ecfcde /arch/x86/include/asm/fsp2/fsp_api.h
parent0b0c6af38738f2c132cfd41a240889acaa031c8f (diff)
parent8fbbec12f7d2c18f8883f3371cfca74a98b5dd87 (diff)
Merge branch 'next'
Bring in the following merges: commit 8fbbec12f7d2c18f8883f3371cfca74a98b5dd87 Merge: 87f69f467a83 63618e71e89b Author: Tom Rini <trini@konsulko.com> Date: Fri Jan 3 09:48:47 2020 -0500 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next - updates and fixes on ls1028a, lx2, ls1046a, MC-DPSPARSER support commit 87f69f467a8335b171c71bf217d2625d515acd7c Merge: c0912f9bbfb2 4466b9970319 Author: Tom Rini <trini@konsulko.com> Date: Tue Dec 24 08:18:19 2019 -0500 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx into next - Enable DM driver on ppc/km boards - Enable DM_USB for some of NXP powerpc platforms: P5040, T4240, T208x, T104x, P4080, P2041, P2020, P1020, P3041 - Some updates in mpc85xx-ddr driver, km boards commit c0912f9bbfb26dd03d189953678691b799d35b6e Merge: 533c9f5714bd a1d6dc3f8407 Author: Tom Rini <trini@konsulko.com> Date: Wed Dec 18 07:20:19 2019 -0500 Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 into next - Various x86 common codes updated for TPL/SPL - I2C designware driver updated for PCI - ICH SPI driver updated to support Apollo Lake - Add Intel FSP2 base support - Intel Apollo Lake platform specific drivers support - Add a new board Google Chromebook Coral commit 533c9f5714bdba79dc6f2629284d4c1a08a611d1 Merge: 553cb0688782 033e18b47bd0 Author: Tom Rini <trini@konsulko.com> Date: Tue Dec 17 07:53:08 2019 -0500 Merge tag '20191217-for-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c into next i2c: for next - misc: i2c_eeprom: Add partition support and add ability to query size of eeprom device and partitions - i2c common: add support for offset overflow in to address and add sandbox tests for it. commit 553cb06887825314e74a9bdac337467c77d1db88 Merge: f39abbbc531e b4f98b3b16ec Author: Tom Rini <trini@konsulko.com> Date: Thu Dec 12 08:18:59 2019 -0500 Merge tag 'dm-next-13dec19' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm into next buildman improvements including toolchain environment feature sandbox unicode support in serial
Diffstat (limited to 'arch/x86/include/asm/fsp2/fsp_api.h')
-rw-r--r--arch/x86/include/asm/fsp2/fsp_api.h63
1 files changed, 63 insertions, 0 deletions
diff --git a/arch/x86/include/asm/fsp2/fsp_api.h b/arch/x86/include/asm/fsp2/fsp_api.h
new file mode 100644
index 00000000000..af1e8857b97
--- /dev/null
+++ b/arch/x86/include/asm/fsp2/fsp_api.h
@@ -0,0 +1,63 @@
+/* SPDX-License-Identifier: Intel */
+/*
+ * Copyright (C) 2015-2016 Intel Corp.
+ * (Written by Andrey Petrov <andrey.petrov@intel.com> for Intel Corp.)
+ * (Written by Alexandru Gagniuc <alexandrux.gagniuc@intel.com> for Intel Corp.)
+ * Mostly taken from coreboot fsp2_0/memory_init.c
+ */
+
+#ifndef __ASM_FSP2_API_H
+#define __ASM_FSP2_API_H
+
+#include <asm/fsp/fsp_api.h>
+
+struct fspm_upd;
+struct fsps_upd;
+struct hob_header;
+
+enum fsp_boot_mode {
+ FSP_BOOT_WITH_FULL_CONFIGURATION = 0x00,
+ FSP_BOOT_WITH_MINIMAL_CONFIGURATION = 0x01,
+ FSP_BOOT_ASSUMING_NO_CONFIGURATION_CHANGES = 0x02,
+ FSP_BOOT_ON_S4_RESUME = 0x05,
+ FSP_BOOT_ON_S3_RESUME = 0x11,
+ FSP_BOOT_ON_FLASH_UPDATE = 0x12,
+ FSP_BOOT_IN_RECOVERY_MODE = 0x20
+};
+
+struct __packed fsp_upd_header {
+ u64 signature;
+ u8 revision;
+ u8 reserved[23];
+};
+
+/**
+ * fsp_memory_init() - Init the SDRAM
+ *
+ * @s3wake: true if we are booting from resume, so cannot reinit the mememory
+ * from scatch since we will lose its contents
+ * @use_spi_flash: true to use the fast SPI driver to read FSP, otherwise use
+ * mapped SPI
+ * @return 0 if OK, -ve on error
+ */
+int fsp_memory_init(bool s3wake, bool use_spi_flash);
+
+typedef asmlinkage int (*fsp_memory_init_func)(struct fspm_upd *params,
+ struct hob_header **hobp);
+
+/**
+ * fsp_silicon_init() - Init the silicon
+ *
+ * This calls the FSP's 'silicon init' entry point
+ *
+ * @s3wake: true if we are booting from resume, so cannot reinit the mememory
+ * from scatch since we will lose its contents
+ * @use_spi_flash: true to use the fast SPI driver to read FSP, otherwise use
+ * mapped SPI
+ * @return 0 if OK, -ve on error
+ */
+int fsp_silicon_init(bool s3wake, bool use_spi_flash);
+
+typedef asmlinkage int (*fsp_silicon_init_func)(struct fsps_upd *params);
+
+#endif