| Age | Commit message (Expand) | Author |
|---|---|---|
| 2012-02-09 | ENGR00174094 i.MX6DL: Change CPU voltages to 1V | Nancy Chen |
| 2012-01-09 | ENGR00170141: Fix debug messages generated by CPUFREQ | Ranjani Vaidyanathan |
| 2012-01-09 | ENGR00162319: MX6 - Add support for updated VDDARM voltages | Ranjani Vaidyanathan |
| 2012-01-09 | ENGR00162460:MX6-Revert "MX6-Disable PLL1 when CPU clk is below 400MHz." | Ranjani Vaidyanathan |
| 2012-01-09 | ENGR00160492: MX6-Disable PLL1 when CPU clk is below 400MHz. | Ranjani Vaidyanathan |
| 2012-01-09 | ENGR00159641: MX6-Add DVFS-CORE support | Ranjani Vaidyanathan |
| 2012-01-09 | ENGR00159959: MX6-Updated CPU voltages for different frequencies | Ranjani Vaidyanathan |
| 2012-01-09 | ENGR00139280: MX6: Add CPUFREQ support | Ranjani Vaidyanathan |
 |
index : linux-toradex.git | |
| Linux kernel for Apalis, Colibri and Verdin modules | Marcel Ziswiler |
| summaryrefslogtreecommitdiff |