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path: root/arch/x86/include/asm
AgeCommit message (Expand)Author
2021-08-26KVM: nSVM: avoid picking up unsupported bits from L2 in int_ctl (CVE-2021-3653)Maxim Levitsky
2021-08-04x86/asm: Ensure asm/proto.h can be included stand-aloneJan Kiszka
2021-07-28x86/fpu: Make init_fpstate correct with optimized XSAVEThomas Gleixner
2021-06-03x86/asm: Add instruction suffixes to bitopsJan Beulich
2021-06-03x86, asm: change the GEN_*_RMWcc() macros to not quote the conditionH. Peter Anvin
2021-03-30x86/tlb: Flush global mappings when KAISER is disabledBorislav Petkov
2021-02-10x86/apic: Add extra serialization for non-serializing MSRsDave Hansen
2020-12-11x86/uprobes: Do not use prefixes.nbytes when looping over prefixes.bytesMasami Hiramatsu
2020-10-01x86/speculation/mds: Mark mds_user_clear_cpu_buffers() __always_inlineThomas Gleixner
2020-06-20x86/speculation: Add support for STIBP always-on preferred modeThomas Lendacky
2020-06-11x86/speculation: Add Special Register Buffer Data Sampling (SRBDS) mitigationMark Gross
2020-06-11x86/cpu: Add a steppings field to struct x86_cpu_idMark Gross
2020-06-11x86/cpu: Rename cpu_data.x86_mask to cpu_data.x86_steppingJia Zhang
2020-06-03x86/dma: Fix max PFN arithmetic overflow on 32 bit systemsAlexander Dahl
2020-05-20x86: Fix early boot crash on gcc-10, third tryBorislav Petkov
2020-05-20x86/paravirt: Remove the unused irq_enable_sysexit pv opBoris Ostrovsky
2020-05-20x86/apm: Don't access __preempt_count with zeroed fsVille Syrjälä
2020-04-24x86/vdso: Fix lsl operand orderSamuel Neves
2020-04-24x86/microcode/intel: replace sync_core() with native_cpuid_reg(eax)Evalds Iodzevics
2020-04-24x86/CPU: Add native CPUID variants returning a single datumBorislav Petkov
2020-04-24x86/mitigations: Clear CPU buffers on the SYSCALL fast pathBorislav Petkov
2020-02-28x86/vdso: Use RDPID in preference to LSL when availableAndy Lutomirski
2020-01-12locking/x86: Remove the unused atomic_inc_short() methdDmitry Vyukov
2020-01-04x86/crash: Add a forward declaration of struct kimageLianbo Jiang
2020-01-04x86/mm: Use the correct function type for native_set_fixmap()Sami Tolvanen
2019-11-28kprobes, x86/ptrace.h: Make regs_get_kernel_stack_nth() not fault on bad stackSteven Rostedt (VMware)
2019-11-25x86/kexec: Correct KEXEC_BACKUP_SRC_END off-by-one errorBjorn Helgaas
2019-11-25kprobes/x86: Prohibit probing on exception masking instructionsMasami Hiramatsu
2019-11-25x86/atomic: Fix smp_mb__{before,after}_atomic()Peter Zijlstra
2019-11-16x86/bugs: Add ITLB_MULTIHIT bug infrastructureVineela Tummalapalli
2019-11-16x86/speculation/taa: Add mitigation for TSX Async AbortPawan Gupta
2019-11-16x86/msr: Add the IA32_TSX_CTRL MSRPawan Gupta
2019-11-16KVM: x86: Emulate MSR_IA32_ARCH_CAPABILITIES on AMD hostsSean Christopherson
2019-11-16KVM: Introduce kvm_get_arch_capabilities()Ben Hutchings
2019-11-06x86/cpu: Add Atom Tremont (Jacobsville)Kan Liang
2019-10-17x86/asm: Fix MWAITX C-state hint valueJanakarajan Natarajan
2019-09-21x86/boot: Add missing bootparam that breaks boot on some platformsCorey Minyard
2019-09-06ptrace,x86: Make user_64bit_mode() available to 32-bit buildsRicardo Neri
2019-09-06x86/CPU/AMD: Clear RDRAND CPUID bit on AMD family 15h/16hTom Lendacky
2019-09-06x86/pm: Introduce quirk framework to save/restore extra MSR registers around ...Chen Yu
2019-09-06x86/boot: Fix boot regression caused by bootparam sanitizingJohn Hubbard
2019-09-06x86/boot: Save fields explicitly, zero out everything elseJohn Hubbard
2019-09-06x86/retpoline: Don't clobber RFLAGS during CALL_NOSPEC on i386Sean Christopherson
2019-08-25x86/vdso: Remove direct HPET access through the vDSOAndy Lutomirski
2019-08-11x86/speculation/swapgs: Exclude ATOMs from speculation through SWAPGSThomas Gleixner
2019-08-11x86/speculation: Prepare entry code for Spectre v1 swapgs mitigationsJosh Poimboeuf
2019-08-11x86: cpufeatures: Sort feature word 7Ben Hutchings
2019-08-06x86/kvm: Don't call kvm_spurious_fault() from .fixupJosh Poimboeuf
2019-08-06x86/apic: Silence -Wtype-limits compiler warningsQian Cai
2019-05-16x86/speculation/mds: Add mitigation mode VMWERVThomas Gleixner